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TCI6630K2L Datasheet, PDF (242/298 Pages) Texas Instruments – Multicore DSP+ARM KeyStone II System-on-Chip
TCI6630K2L
SPRS893E – MAY 2013 – REVISED JANUARY 2015
www.ti.com
Figure 11-12. PLLDIV Divider Ratio Change Status Register (DCHANGE)
31
5
4
32
0
Reserved
SYS4 SYS3
Reserved
R-0
R/W-1 R/W-1
R-0
Legend: R/W = Read/Write; R = Read only; -n = value after reset, for reset value
Table 11-19. PLLDIV Divider Ratio Change Status Register Field Descriptions
Bit
31-5
2-0
4
3
Field
Reserved
SYS4
SYS3
Description
Reserved. This bit location is always read as 0. A value written to this field has no effect.
Identifies when the SYSCLK n divide ratio has been modified.
• 0 = SYSCLK n ratio has not been modified. When GOSET is set, SYSCLK n will not be affected.
• 1 = SYSCLK n ratio has been modified. When GOSET is set, SYSCLK n will change to the new ratio.
11.5.3.5 SYSCLK Status Register (SYSTAT)
The SYSCLK Status Register (SYSTAT) shows the status of SYSCLK[4:1]. SYSTAT is shown in
Figure 11-13 and described in Table 11-20.
Figure 11-13. SYSCLK Status Register (SYSTAT)
31
Reserved
R-n
Legend: R/W = Read/Write; R = Read only; -n = value after reset
4
3
2
1
0
SYS4ON SYS3ON SYS2ON SYS1ON
R-1
R-1
R-1
R-1
Bit
31-4
3-0
Field
Reserved
SYS[N (1)]ON
(1) Where N = 1, 2, 3, or 4
Table 11-20. SYSCLK Status Register Field Descriptions
Description
Reserved. This location is always read as 0. A value written to this field has no effect.
SYSCLK[N] on status
• 0 = SYSCLK[N] is gated
• 1 = SYSCLK[N] is on
11.5.3.6 Reset Type Status Register (RSTYPE)
The Reset Type Status (RSTYPE) Register latches the cause of the last reset. If multiple reset sources
occur simultaneously, this register latches the highest priority reset source. The Reset Type Status
Register is shown in Figure 11-14 and described in Table 11-21.
Figure 11-14. Reset Type Status Register (RSTYPE)
31
29
28
27
12
Reserved
EMU-RST
Reserved
R-0
R-0
R-0
Legend: R = Read only; -n = value after reset
11
8
WDRST[N]
R-0
7
3
Reserved
R-0
2
1
PLLCTRLRST
R-0
RESET
R-0
0
POR
R-0
Bit
31-29
28
Field
Reserved
EMU-RST
27-12 Reserved
Table 11-21. Reset Type Status Register Field Descriptions
Description
Reserved. Always reads as 0. Writes have no effect.
Reset initiated by emulation
• 0 = Not the last reset to occur
• 1 = The last reset to occur
Reserved. Always reads as 0. Writes have no effect.
242 TCI6630K2L Peripheral Information and Electrical Specifications
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