TCI6630K2L Datasheet, PDF (139/298 Pages) Texas Instruments – Multicore DSP+ARM KeyStone II System-on-Chip

www.ti.com
6630
NETCP_GLOBAL0 _M
NETCP_GLOBAL1 _M
IQN_CDMA M
RAC_0_BE1_HP _M
TC_0 _M
EDMA ^TC_1 M
CC1 _{TC_2 M}
TC_3 _M
TC_0 _M
EDMA ^TC_1 M
CC2 _{TC_2 M}
TC_3 _M
PCIe_0 _M
TCI6630K2L
SPRS893E – MAY 2013 – REVISED JANUARY 2015
Tracer_TAC_BE
Tracer_QM_M
MPU_1
TNet_3_E
CPU/3
Bridge_42
Tracer
_RAC
BCR
CPU/3
S ^TAC_BE1
S ^QM_SS
Tracer_SPI_
ROM_EMIF16
S ^PCIe_0
S ^TCP3d_0
S ^TCP3d_1
S ^RAC_0_FE
To TeraNet C66x SDMA
L2 Cache_0_A
L2 Cache_0_B
L2 Cache_1_A
L2 Cache_1_B
L2 Cache_2_A
L2 Cache_2_B
L2 Cache_3_A
L2 Cache_3_B
L2 Cache_4_A
L2 Cache_4_B
L2 Cache_5_A
L2 Cache_5_B
L2 Cache_6_A
L2 Cache_6_B
L2 Cache_7_A
L2 Cache_7_B
Figure 8-2. TeraNet 3_A-2
Copyright © 2013–2015, Texas Instruments Incorporated
Submit Documentation Feedback
Product Folder Links: TCI6630K2L
System Interconnect 139