TCI6630K2L Datasheet, PDF (160/298 Pages) Texas Instruments – Multicore DSP+ARM KeyStone II System-on-Chip

TCI6630K2L
SPRS893E – MAY 2013 – REVISED JANUARY 2015
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9.1.2.1 Boot Device Field
The Boot Device field BOOTMODE[16-14-4-3-2-1] and the Boot Device field BOOTMODE[8] define the
boot device and the boot master that is chosen. Table 9-3 shows the supported boot modes.
Bit
16, 14, 4, 3,
2, 1
Field
Boot Device
Table 9-3. Boot Mode Pins: Boot Device Values
Description
Device boot mode
• ARM is a boot master when BOOTMODE[8]=0
• C66x is a boot master when BOOTMODE[8]=1
– Sleep = XX[Min]000b
– I²C Slave = [Slave Addr1]1[Min]000b
– PCI = [Ref clk][Bar Config2]Port001b
– I²C Master = XX[Min]010b
– SPI = [Width1][Mode0][Min]011b
– EMIF = 0[Width][Min]100b
– NAND = Clear[FirstBlock0][Min]101b
– Ethernet (SGMII) = Lane Setup [Ref Clk][Min]110b
– UART = XX[Min]111b
9.1.2.2 Device Configuration Field
The device configuration fields DEVSTAT[16:1] are used to configure the boot peripheral and, therefore,
the bit definitions depend on the boot mode.
9.1.2.2.1 Sleep Boot Mode Configuration
Figure 9-2. Sleep Boot Mode Configuration Fields Description
DEVSTAT Boot Mode Pins ROM Mapping
16 15 14
13
12
11 10 9
8
7
6
5
4
3
2
1
0
X
X
X ARMen SYSEN
ARM PLL Cfg
Boot
Master
Sys PLL Config
Min
000
Lendian
Bit
16-14
13
Field
Reserved
ARMen
12
SYSEN
11-9
8
ARM PLL
Setting
Boot Master
7-5 SYS PLL
Setting
4
Min
Table 9-4. Sleep Boot Configuration Field Descriptions
Description
Reserved
Enable the ARM PLL
• 0 = PLL disabled
• 1 = PLL enabled
Enable the System PLL
• 0 = PLL disabled (default)
• 1 = PLL enabled
The PLL default settings are determined by the [11:9] bits. This will set the PLL to the maximum clock setting for
the device. Table 9-23 shows settings for various input clock frequencies.
Boot Master select
• 0 = ARM is boot master
• 1 = C66x is boot master
The PLL default settings are determined by the [7:5] bits. This will set the PLL to the maximum clock setting for
the device. Table 9-23 shows settings for various input clock frequencies.
Minimum boot configuration select bit.
• 0 = Minimum boot pin select disabled
• 1 = Minimum boot pin select enabled.
When Min = 1, a predetermined set of values is configured (see the Device Configuration Field Descriptions table
for configuration bits with a "(default)" tag added in the description column).
When Min = 0, all fields must be independently configured.
160 Device Boot and Configuration
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