TCI6630K2L Datasheet, PDF (69/298 Pages) Texas Instruments – Multicore DSP+ARM KeyStone II System-on-Chip

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TCI6630K2L
SPRS893E – MAY 2013 – REVISED JANUARY 2015
Table 7-1. Device Memory Map Summary for TCI6630K2L (continued)
PHYSICAL 40 BIT ADDRESS
START
END
08 0000 0000 09 FFFF FFFF
0A 0000 0000 FF FFFF FFFF
BYTES
8G
984G
ARM VIEW
DDR3A data
Reserved
DSP VIEW
DDR3A data⁽²⁾
Reserved
SOC VIEW
DDR3A data⁽³⁾
Reserved
7.2 Memory Protection Unit (MPU)
CFG (configuration) space of all slave devices on the TeraNet is protected by the MPU. The TCI6630K2L
contains sixteen MPUs:
• MPU0 is used for main TeraNet_3P_B (SCR_3P (B)) CFG.
• MPU1/2/5 are used for QM_SS (one for VBUSM port and one each for the two configuration VBUSP
ports).
• MPU3 is reserved.
• MPU4 is used for RAC.
• MPU6 is reserved.
• MPU7 is used for OSR data.
• MPU8 is used for EMIF16.
• MPU9 is used for interrupt controllers (GIC, CIC0 and CIC2) connected to TeraNet_3P (SCR_3P).
• MPU10 is used for semaphore.
• MPU11 is used to protect TeraNet_6P_B (SCR_6P (B)) CPU/6 CFG TeraNet.
• MPU12/13/14 are used for SPI0/1/2.
• MPU15 is used DFE, IQNet and NetCP CFG.
This section contains MPU register map and details of device-specific MPU registers only. For MPU
features and details of generic MPU registers, see the KeyStone Architecture Memory Protection Unit
(MPU) User's Guide (SPRUGW5).
The following tables show the configuration of each MPU and the memory regions protected by each
MPU.
Table 7-2. MPU0-MPU5 Default Configuration
SETTING
MPU0
MPU1
MAIN SCR_3P QM_SS DATA
(B)
PORT
Default permission
Assume
allowed
Assume allowed
Number of allowed IDs 16
16
supported
Number of programmable 16
16
ranges supported
Compare width
1KB granularity 1KB granularity
MPU2
QM_SS CFG1
PORT
Assume allowed
16
16
1KB granularity
MPU3
Reserved
MPU4
RAC
Assume
allowed
16
MPU5
QM_SS CFG2
PORT
Assume
allowed
16
4
16
1KB granularity 1KB granularity
Table 7-3. MPU6-MPU11 Default Configuration
SETTING
Default permission
MPU6
Reserved
Number of allowed IDs
supported
Number of programmable
ranges supported
Compare width
MPU7
OSR
Assume allowed
16
16
1KB granularity
MPU8
EMIF16
Assume allowed
16
8
1KB granularity
MPU9
CIC
Assume
allowed
16
MPU10
SM
Assume
allowed
16
MPU11
SCR_6P (B)
Assume
allowed
16
4
2
16
1KB granularity 1KB granularity 1KB granularity
Copyright © 2013–2015, Texas Instruments Incorporated
Memory, Interrupts, and EDMA for TCI6630K2L
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