TCI6630K2L Datasheet, PDF (275/298 Pages) Texas Instruments – Multicore DSP+ARM KeyStone II System-on-Chip

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TCI6630K2L
SPRS893E – MAY 2013 – REVISED JANUARY 2015
11.26 General-Purpose Input/Output (GPIO)
11.26.1 GPIO Device-Specific Information
The GPIO peripheral pins are used for general purpose input/output for the device. These pins are also
used to configure the device at boot time.
For more detailed information on device/peripheral configuration and the TCI6630K2L device pin muxing,
see Section 9.2.
These GPIO pins can also be used to generate individual core interrupts (no support of bank interrupt)
and EDMA events.
11.26.2 GPIO Peripheral Register Description
Hex Address Offsets
0x0008
0x000C
0x0010
0x0014
0x0018
0x001C
0x0020
0x0024
0x0028
0x002C
0x0030
0x008C
0x0090 - 0x03FF
Acronym
BINTEN
-
DIR
OUT_DATA
SET_DATA
CLR_DATA
IN_DATA
SET_RIS_TRIG
CLR_RIS_TRIG
SET_FAL_TRIG
CLR_FAL_TRIG
-
-
Table 11-62. GPIO Registers
Register Name
GPIO interrupt per bank enable register
Reserved
GPIO Direction Register
GPIO Output Data Register
GPIO Set Data Register
GPIO Clear Data Register
GPIO Input Data Register
GPIO Set Rising Edge Interrupt Register
GPIO Clear Rising Edge Interrupt Register
GPIO Set Falling Edge Interrupt Register
GPIO Clear Falling Edge Interrupt Register
Reserved
Reserved
11.26.3 GPIO Electrical Data/Timing
Table 11-63. GPIO Input Timing Requirements⁽¹⁾
(see Figure 11-59)
NO.
MIN
1
t_w(GPOH)
Pulse duration, GPOx high
12C
2
t_w(GPOL)
Pulse duration, GPOx low
12C
(1) C = 1/SYSCLK1 clock frequency in ns
Table 11-64. GPIO Output Switching Characteristics⁽¹⁾
(see Figure 11-59)
NO.
PARAMETER
MIN
3
t_w(GPOH)
4
t_w(GPOL)
Pulse duration, GPOx high
Pulse duration, GPOx low
36C - 8
36C - 8
(1) C = 1/SYSCLK1 clock frequency in ns
MAX UNIT
ns
ns
MAX UNIT
ns
ns
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TCI6630K2L Peripheral Information and Electrical Specifications 275
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