TCI6630K2L Datasheet, PDF (280/298 Pages) Texas Instruments – Multicore DSP+ARM KeyStone II System-on-Chip

TCI6630K2L
SPRS893E – MAY 2013 – REVISED JANUARY 2015
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11.30 Receive Accelerator Coprocessor (RAC)
The TCI6630K2L has a Receive Accelerator Coprocessor (RAC) subsystem. The RAC subsystem is a
receive chip-rate accelerator based on a generic correlator coprocessor (GCCP). It supports Universal
Mobile Telecommunications System (UMTS) operations and assists in transferring data received from the
antenna to the receive core and performs receive functions that target the WCDMA macro bits.
The RAC subsystem consists of several components:
• Two GCCP accelerators for finger despread (FD), path monitor (PM), preamble detection (PD), and
stream power estimator (SPE)
• Back-end interface (BEI) for management of the RAC configuration and the data output.
• Front-end interface (FEI) for reception of the antenna data for processing and access to all MMRs
(memory-mapped registers) and memories in the RAC components
The RAC has a total of three ports connected to the switch fabric:
• BEI includes two master connections to the switch fabric for output data to device memory. One is 128-
bit and the other is 64-bit. Both are clocked at a SYSCLK1 divided by 3 or 4 rate.
• The FEI has a 64-bit slave connection to the switch fabric for input data as well as direct memory
access (to facilitate debug)
11.31 Transmit Accelerator Coprocessor (TAC)
The Transmit Accelerator Coprocessor (TAC) subsystem is a transmit chip-rate accelerator for support of
UMTS (Universal Mobile Telecommunications System) applications.
11.32 Fast Fourier Transform Coprocessor (FFTC)
There are two Fast Fourier Transform Coprocessors (FFTC) used to accelerate FFT, IFFT, DFT, and IDFT
operations. For more information, see the KeyStone Architecture Fast Fourier Transform Coprocessor
(FFTC) User's Guide (SPRUGS2).
11.33 Universal Serial Bus 3.0 (USB 3.0)
The device includes a USB 3.0 controller providing the following capabilities:
• Support of USB 3.0 peripheral (or device) mode at the following speeds:
– Super Speed (SS) (5 Gbps)
– High Speed (HS) (480 Mbps)
– Full Speed (FS) (12 Mbps)
• Support of USB 3.0 host mode at the following speeds:
– Super Speed (SS) (5 Gbps)
– High Speed (HS) (480 Mbps)
– Full Speed (FS) (12 Mbps)
– Low Speed (LS) (1.5 Mbps)
• Integrated DMA controller with extensible Host Controller Interface (xHCI) support
• Support for 14 transmit and 14 receive endpoints plus control EP0
For more information, see the KeyStone II Architecture Universal Serial Bus 3.0 (USB 3.0) User's Guide
(SPRUHJ7).
11.34 Universal Subscriber Identity Module (USIM)
The TCI6630K2L is equipped with a Universal Subscriber Identity Module (USIM) for user authentication.
The USIM is compatible with ISO, ETSI/GSM, and 3GPP standards.
The USIM is implemented for support of secure devices only. Contact your local technical sales
representative for further details.
280 TCI6630K2L Peripheral Information and Electrical Specifications
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