TCI6630K2L Datasheet, PDF (150/298 Pages) Texas Instruments – Multicore DSP+ARM KeyStone II System-on-Chip

TCI6630K2L
SPRS893E – MAY 2013 – REVISED JANUARY 2015
www.ti.com
Bridge 20
From TeraNet_3P_B
K2L
TNet_3P_V
CPU/3
S ^{Timer (´ 14)}
S
USIM
S
OTP
S ^{Debug SS}
S ^PLL_CTL
S
GPSC
S ^BOOT_CFG
S ^{UART0, 1}
S ^{I2C (´ 3)}
S ^GPIO_0
S
USB PHY CFG
S
USB MMR CFG
S ^{DDR3A PHY CFG}
S
SmartReflex0
S ^{CSISC2 SerDes CFG0}
S ^{CSISC2 SerDes CFG1}
S ^{CSISC2 SerDes CFG2}
S ^{CSISC2 SerDes CFG3}
TNet_6P_G
CPU/3
Figure 8-7. TeraNet 6P_B
S ^GPIO_2
S ^UART2
S ^UART3
S ^OSR_CFG
150 System Interconnect
Submit Documentation Feedback
Product Folder Links: TCI6630K2L
Copyright © 2013–2015, Texas Instruments Incorporated