TCI6630K2L Datasheet, PDF (137/298 Pages) Texas Instruments – Multicore DSP+ARM KeyStone II System-on-Chip

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TCI6630K2L
SPRS893E – MAY 2013 – REVISED JANUARY 2015
8 System Interconnect
On the KeyStone II devices, the C66x CorePac, the EDMA3 transfer controllers and the system
peripherals are interconnected through the TeraNets, which are non-blocking switch fabrics enabling fast
and contention-free internal data movement. The TeraNets provide low-latency, concurrent data transfers
between master peripherals and slave peripherals. The TeraNets also allow for seamless arbitration
between the system masters when accessing system slaves.
The ARM CorePac is connected to the MSMC and the debug subsystem directly, and to other masters via
the TeraNets. Through the MSMC, the ARM CorePacs can be interconnected to DDR3A and TeraNet
3_A, which allows the ARM CorePacs to access to the peripheral buses:
• TeraNet 3P_A for peripheral configuration
• TeraNet 6P_A for ARM Boot ROM
8.1 Internal Buses and Switch Fabrics
The C66x CorePacs, the ARM CorePacs, the EDMA3 traffic controllers, and the various system
peripherals can be classified into two categories: masters and slaves.
• Masters are capable of initiating read and write transfers in the system and do not rely on the EDMA3
for their data transfers.
• Slaves on the other hand rely on the masters to perform transfers to and from them.
Examples of masters include the EDMA3 traffic controllers and network coprocessor packet DMA.
Examples of slaves include the SPI, UART, and I²C.
The masters and slaves in the device communicate through the TeraNet (switch fabric). The device
contains two types of switch fabric:
• Data TeraNet is a high-throughput interconnect mainly used to move data across the system
• Configuration TeraNet is mainly used to access peripheral registers
Some peripherals have both a data bus and a configuration bus interface, while others only have one type
of interface. Furthermore, the bus interface width and speed varies from peripheral to peripheral.
Note that the data TeraNet also connects to the configuration TeraNet.
8.2 Switch Fabric Connections Matrix - Data Space
The figures below show the connections between masters and slaves through various sections of the
TeraNet.
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