TCI6630K2L Datasheet, PDF (255/298 Pages) Texas Instruments – Multicore DSP+ARM KeyStone II System-on-Chip

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PLLM
DFE PLL
TCI6630K2L
SPRS893E – MAY 2013 – REVISED JANUARY 2015
SYSCLK(N|P)
PLLD
VCO
CLKOD
INTBYPASS
0
DFE
PLLOUT
0
1
1
BYPASS
PLLCTL_SYSCLK
Figure 11-35. DFE PLL Block Diagram
1
/n
0
PLLSEL
DFE
11.8.1 DFE PLL Control Registers
The DFE PLL, which is used to drive the DFE and IQN, does not use a PLL controller. DFE PLL can be
controlled using the DFEPLLCTL0 and DFEPLLCTL1 registers located in the Bootcfg module. These
MMRs (memory-mapped registers) exist inside the Bootcfg space. To write to these registers, software
must go through an unlocking sequence using the KICK0 and KICK1 registers. For suggested
configuration values, see Section 9.1.4.1. See Section 9.2.3.5 for the address location of the registers and
locking and unlocking sequences for accessing these registers. These registers are reset on POR only.
Figure 11-36. DFE PLL Control Register 0 (DFEPLLCTL0)
31
24
23
22
19
18
BWADJ[7:0]
BYPASS
CLKOD
RW-0000 1001
RW-1
RW-0001
Legend: RW = Read/Write; -n = value after reset
PLLM
RW-0000000010011
6
5
0
PLLD
RW-000000
Bit Field
31-24 BWADJ[7:0]
23
BYPASS
22-19 CLKOD
18-6 PLLM
5-0 PLLD
Table 11-36. DFE PLL Control Register 0 Field Descriptions (DFEPLLCTL0)
Description
BWADJ[11:8] and BWADJ[7:0] are located in DFEPLLCTL0 and DFEPLLCTL1 registers. BWADJ[11:0] should
be programmed to a value related to PLLM[12:0] value based on the equation: BWADJ = ((PLLM+1)>>1) - 1.
PLL bypass mode:
• 0 = PLL is not in BYPASS mode
• 1 = PLL is in BYPASS mode
A 4-bit field that selects the values for the PLL post divider. Valid post divider values are 1 and even values
from 2 to 16. CLKOD field is loaded with output divide value minus 1
A 13-bit field that selects the values for the multiplication factor (see note below). PLLM field is loaded with the
multiply factor minus 1.
A 6-bit field that selects the values for the reference divider. PLLD field is loaded with reference divide value
minus 1.
Figure 11-37. DFE PLL Control Register 1 (DFEPLLCTL1)
31
15
14
Reserved
PLLRST
RW - 00000000000000000
RW-0
Legend: RW = Read/Write; - n = value after reset
13
DFEPLL
RW-0
12
7
Reserved
RW-000000
6
ENSAT
RW-0
5
4
Reserved
R-00
3
0
BWADJ[11:8]
RW- 0000
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TCI6630K2L Peripheral Information and Electrical Specifications 255
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