TCI6630K2L Datasheet, PDF (118/298 Pages) Texas Instruments – Multicore DSP+ARM KeyStone II System-on-Chip

TCI6630K2L
SPRS893E – MAY 2013 – REVISED JANUARY 2015
www.ti.com
Table 7-25. CIC2 Event Inputs (Secondary Events for EDMA3CC0, EDMACC1 and EDMA3CC2) (continued)
EVENT NO.
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
EVENT NAME
ARM_NCNTPNSIRQ1
ARM_NCNTPNSIRQ0
ARM_TBR_DMA
RAC_INT
Reserved
USB_INT02
USB_INT03
GPIO_INT0
GPIO_INT1
GPIO_INT2
GPIO_INT3
GPIO_INT4
GPIO_INT5
GPIO_INT6
GPIO_INT7
IPC_GR0
IPC_GR1
IPC_GR2
IPC_GR3
Reserved
Reserved
Reserved
Reserved
DESCRIPTION
ARM NCNTPNSIRQ1
ARM NCNTPNSIRQ0
ARM trace buffer (TBR) DMA event
RAC interrupt
USB interrupt
USB interrupt
GPIO interrupt
GPIO interrupt
GPIO interrupt
GPIO interrupt
GPIO interrupt
GPIO interrupt
GPIO interrupt
GPIO interrupt
IPC interrupt generation
IPC interrupt generation
IPC interrupt generation
IPC interrupt generation
7.3.2 CIC Registers
This section includes the CIC memory map information and registers.
7.3.2.1 CIC0 Register Map
ADDRESS
OFFSET
0x0
0x4
0xC
0x10
0x20
0x24
0x28
0x2C
0x34
0x38
0x200
0x204
0x208
0x20C
0x210
Table 7-26. CIC0 Registers
REGISTER MNEMONIC
REVISION_REG
CONTROL_REG
HOST_CONTROL_REG
GLOBAL_ENABLE_HINT_REG
STATUS_SET_INDEX_REG
STATUS_CLR_INDEX_REG
ENABLE_SET_INDEX_REG
ENABLE_CLR_INDEX_REG
HINT_ENABLE_SET_INDEX_REG
HINT_ENABLE_CLR_INDEX_REG
RAW_STATUS_REG0
RAW_STATUS_REG1
RAW_STATUS_REG2
RAW_STATUS_REG3
RAW_STATUS_REG4
REGISTER NAME
Revision Register
Control Register
Host Control Register
Global Host Int Enable Register
Status Set Index Register
Status Clear Index Register
Enable Set Index Register
Enable Clear Index Register
Host Int Enable Set Index Register
Host Int Enable Clear Index Register
Raw Status Register 0
Raw Status Register 1
Raw Status Register 2
Raw Status Register 3
Raw Status Register 4
118 Memory, Interrupts, and EDMA for TCI6630K2L
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