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TCI6630K2L Datasheet, PDF (112/298 Pages) Texas Instruments – Multicore DSP+ARM KeyStone II System-on-Chip
TCI6630K2L
SPRS893E – MAY 2013 – REVISED JANUARY 2015
www.ti.com
Table 7-25. CIC2 Event Inputs (Secondary Events for EDMA3CC0, EDMACC1 and EDMA3CC2) (continued)
EVENT NO.
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
EVENT NAME
QMSS_INTD_2_HIGH_21
QMSS_INTD_2_HIGH_22
QMSS_INTD_2_HIGH_23
QMSS_INTD_2_HIGH_24
QMSS_INTD_2_HIGH_25
QMSS_INTD_2_HIGH_26
QMSS_INTD_2_HIGH_27
QMSS_INTD_2_HIGH_28
QMSS_INTD_2_HIGH_29
QMSS_INTD_2_HIGH_30
QMSS_INTD_2_HIGH_31
MPU_12_INT
MPU_13_INT
MPU_14_INT
QMSS_QUE_PEND_607
QMSS_QUE_PEND_608
QMSS_QUE_PEND_609
QMSS_QUE_PEND_610
QMSS_QUE_PEND_611
QMSS_QUE_PEND_612
QMSS_QUE_PEND_613
QMSS_QUE_PEND_614
QMSS_QUE_PEND_615
QMSS_QUE_PEND_616
TRACER_QMSS_QM_CFG2_INT
TRACER_EDMACC_0
TRACER_EDMACC_123_INT
TRACER_CIC_INT
MPU_4_INT
MPU_5_INT
MPU_6_INT
MPU_7_INT
MPU_8_INT
Reserved
Reserved
SR_0_VPSMPSACK
DDR3_0_ERR
Reserved
EDMACC_0_ERRINT
EDMACC_0_MPINT
EDMACC_0_TC_0_ERRINT
EDMACC_0_TC_1_ERRINT
EDMACC_1_ERRINT
EDMACC_1_MPINT
EDMACC_1_TC_0_ERRINT
EDMACC_1_TC_1_ERRINT
DESCRIPTION
Navigator second hi interrupt
Navigator second hi interrupt
Navigator second hi interrupt
Navigator second hi interrupt
Navigator second hi interrupt
Navigator second hi interrupt
Navigator second hi interrupt
Navigator second hi interrupt
Navigator second hi interrupt
Navigator second hi interrupt
Navigator second hi interrupt
MPU12 addressing violation interrupt and protection violation interrupt
MPU13 addressing violation interrupt and protection violation interrupt
MPU14 addressing violation interrupt and protection violation interrupt
Navigator transmit queue pending event for indicated queue
Navigator transmit queue pending event for indicated queue
Navigator transmit queue pending event for indicated queue
Navigator transmit queue pending event for indicated queue
Navigator transmit queue pending event for indicated queue
Navigator transmit queue pending event for indicated queue
Navigator transmit queue pending event for indicated queue
Navigator transmit queue pending event for indicated queue
Navigator transmit queue pending event for indicated queue
Navigator transmit queue pending event for indicated queue
Tracer sliding time window interrupt for Navigator CFG2 slave port
Tracer sliding time window interrupt foR EDMA3CC0
Tracer sliding time window interrupt for EDMA3CC1, EDMA3CC2 and
EDMA3CC3
Tracer sliding time window interrupt for interrupt controllers (CIC)
MPU4 addressing violation interrupt and protection violation interrupt
MPU5 addressing violation interrupt and protection violation interrupt
MPU6 addressing violation interrupt and protection violation interrupt
MPU7 addressing violation interrupt and protection violation interrupt
MPU8 addressing violation interrupt and protection violation interrupt
SmartReflex VPVOLTUPDATE asserted and SMPS has acknowledged in a
defined time interval
DDR3A error interrupt
EDMA3CC0 error interrupt
EDMA3CC0 memory protection interrupt
EDMA3CC0 TPTC0 error interrupt
EDMA3CC0 TPTC1 error interrupt
EDMA3CC1 error interrupt
EDMA3CC1 memory protection interrupt
EDMA3CC1 TPTC0 error interrupt
EDMA3CC1 TPTC1 error interrupt
112 Memory, Interrupts, and EDMA for TCI6630K2L
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