TCI6630K2L Datasheet, PDF (98/298 Pages) Texas Instruments – Multicore DSP+ARM KeyStone II System-on-Chip

TCI6630K2L
SPRS893E – MAY 2013 – REVISED JANUARY 2015
www.ti.com
Table 7-24 and Table 7-25 list the CIC0 and CIC2 event inputs.
EVENT NO.
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
Table 7-24. CIC0 Event Inputs — C66x CorePac Secondary Interrupts
EVENT NAME
EDMACC_1_ERRINT
EDMACC_1_MPINT
EDMACC_1_TC_0_ERRINT
EDMACC_1_TC_1_ERRINT
EDMACC_1_TC_2_ERRINT
EDMACC_1_TC_3_ERRINT
EDMACC_1_GINT
QMSS_QUE_PEND_637
EDMACC_1_TC_0_INT
EDMACC_1_TC_1_INT
EDMACC_1_TC_2_INT
EDMACC_1_TC_3_INT
EDMACC_1_TC_4_INT
EDMACC_1_TC_5_INT
EDMACC_1_TC_6_INT
EDMACC_1_TC_7_INT
EDMACC_2_ERRINT
EDMACC_2_MPINT
EDMACC_2_TC_0_ERRINT
EDMACC_2_TC_1_ERRINT
EDMACC_2_TC_2_ERRINT
EDMACC_2_TC_3_ERRINT
EDMACC_2_GINT
QMSS_QUE_PEND_638
EDMACC_2_TC_0_INT
EDMACC_2_TC_1_INT
EDMACC_2_TC_2_INT
EDMACC_2_TC_3_INT
EDMACC_2_TC_4_INT
EDMACC_2_TC_5_INT
EDMACC_2_TC_6_INT
EDMACC_2_TC_7_INT
EDMACC_0_ERRINT
EDMACC_0_MPINT
EDMACC_0_TC_0_ERRINT
EDMACC_0_TC_1_ERRINT
EDMACC_0_GINT
QMSS_QUE_PEND_639
EDMACC_0_TC_0_INT
EDMACC_0_TC_1_INT
EDMACC_0_TC_2_INT
EDMACC_0_TC_3_INT
EDMACC_0_TC_4_INT
EDMACC_0_TC_5_INT
EDMACC_0_TC_6_INT
DESCRIPTION
EDMA3CC1 error interrupt
EDMA3CC1 memory protection interrupt
EDMA3CC1 TPTC0 error interrupt
EDMA3CC1 TPTC1 error interrupt
EDMA3CC1 TPTC2 error interrupt
EDMA3CC1 TPTC3 error interrupt
EDMA3CC1 GINT
Navigator transmit queue pending event for indicated queue
EDMA3CC1 individual completion interrupt
EDMA3CC1 individual completion interrupt
EDMA3CC1 individual completion interrupt
EDMA3CC1 individual completion interrupt
EDMA3CC1 individual completion interrupt
EDMA3CC1 individual completion interrupt
EDMA3CC1 individual completion interrupt
EDMA3CC1 individual completion interrupt
EDMA3CC2 error interrupt
EDMA3CC2 memory protection interrupt
EDMA3CC2 TPTC0 error interrupt
EDMA3CC2 TPTC1 error interrupt
EDMA3CC2 TPTC2 error interrupt
EDMA3CC2 TPTC3 error interrupt
EDMA3CC2 GINT
Navigator transmit queue pending event for indicated queue
EDMA3CC2 individual completion interrupt
EDMA3CC2 individual completion interrupt
EDMA3CC2 individual completion interrupt
EDMA3CC2 individual completion interrupt
EDMA3CC2 individual completion interrupt
EDMA3CC2 individual completion interrupt
EDMA3CC2 individual completion interrupt
EDMA3CC2 individual completion interrupt
EDMA3CC0 error interrupt
EDMA3CC0 memory protection interrupt
EDMA3CC0 TPTC0 error interrupt
EDMA3CC0 TPTC1 error interrupt
EDMA3CC0 global completion interrupt
Navigator transmit queue pending event for indicated queue
EDMA3CC0 individual completion interrupt
EDMA3CC0 individual completion interrupt
EDMA3CC0 individual completion interrupt
EDMA3CC0 individual completion interrupt
EDMA3CC0 individual completion interrupt
EDMA3CC0 individual completion interrupt
EDMA3CC0 individual completion interrupt
98
Memory, Interrupts, and EDMA for TCI6630K2L
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