HD6417750RF240V Datasheet, PDF (96/606 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

Section 4 Exception Handling
Vector fetch
Internal Prefetch of first
processing program instruction
φ
RES
Internal
address bus
(1)
(3)
(5)
Internal read
signal
Internal write
signal
Internal data
bus
High
(2)
(4)
(6)
(1)(3) Reset exception handling vector address(when reset, (1)=H'000000, (3)=H'000002)
(2)(4) Start address (contents of reset exception handling vector address)
(5) Start address ((5)=(2)(4))
(6) First program instruction
Figure 4.1 Reset Sequence (Advanced Mode with On-Chip ROM Enabled)
Rev. 7.00 Sep. 11, 2009 Page 60 of 566
REJ09B0211-0700