HD6417750RF240V Datasheet, PDF (435/606 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

Section 15 Controller Area Network (HCAN)
Bit Bit Name Initial Value R/W Description
12 IRR4
0
R/(W)^* Receive Overload Warning Interrupt Flag
Status flag indicating the error warning state caused
by the receive error counter.
[Setting condition]
• When REC ≥ 96
11 IRR3
0
[Clearing condition]
• Writing 1
R/(W)^* Transmit Overload Warning Interrupt Flag
Status flag indicating the error warning state caused
by the transmit error counter.
[Setting condition]
• When TEC ≥ 96
10 IRR2
0
[Clearing condition]
• Writing 1
R
Remote Frame Request Interrupt Flag
Status flag indicating that a remote frame has been
received in a mailbox (buffer).
[Setting condition]
• When remote frame reception is completed, when
corresponding MBIMR = 0
9 IRR1
0
[Clearing condition]
• Clearing of all bits in RFPR (remote request
register)
R
Receive Message Interrupt Flag
Status flag indicating that a mailbox (buffer) receive
message has been received normally.
[Setting condition]
• When data frame or remote frame reception is
completed, when corresponding MBIMR = 0
[Clearing condition]
• Clearing of all bits in RXPR (receive complete
register)
Rev. 7.00 Sep. 11, 2009 Page 399 of 566
REJ09B0211-0700