HD6417750RF240V Datasheet, PDF (329/606 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

Section 12 Programmable Pulse Generator (PPG)
12.4.3 Sample Setup Procedure for Normal Pulse Output
Figure 12.4 shows a sample procedure for setting up normal pulse output.
TPU setup
Port and
PPG setup
TPU setup
Normal PPG output
Select TGR functions [1]
Set TGRA value
[2]
Set counting operation [3]
Select interrupt request [4]
Set initial output data [5]
Enable pulse output
[6]
Select output trigger
[7]
Set next pulse
output data
[8]
Start counter
Compare match?
Yes
Set next pulse
output data
[9]
No
[10]
[1] Set TIOR to make TGRA an output
compare register (with output
disabled).
[2] Set the PPG output trigger period.
[3] Select the counter clock source with
bits TPSC2 to TPSC0 in TCR.
Select the counter clear source with
bits CCLR1 and CCLR0.
[4] Enable the TGIA interrupt in TIER.
The DTC can also be set up to
transfer data to NDR.
[5] Set the initial output values in
PODR.
[6] Set the DDR and NDER bits for the
pins to be used for pulse output to 1.
[7] Select the TPU compare match
event to be used as the output
trigger in PCR.
[8] Set the next pulse output values in
NDR.
[9] Set the CST bit in TSTR to 1 to start
the TCNT counter.
[10] At each TGIA interrupt, set the next
output values in NDR.
Figure 12.4 Setup Procedure for Normal Pulse Output (Example)
Rev. 7.00 Sep. 11, 2009 Page 293 of 566
REJ09B0211-0700