HD6417750RF240V Datasheet, PDF (463/606 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

Section 15 Controller Area Network (HCAN)
15.4.6 HCAN Halt Mode
The HCAN halt mode is provided to enable mailbox settings to be changed without performing an
HCAN hardware or software reset. Figure 15.14 shows a flowchart of the HCAN halt mode.
MCR1 = 1
Bus idle?
No
Yes
MBCR setting
MCR1 = 0
CAN bus communication possible
: Settings by user
: Processing by hardware
Figure 15.14 HCAN Halt Mode Flowchart
HCAN halt mode is entered by setting the halt request bit (MCR1) to 1 in the master control
register (MCR). If the CAN bus is operating, the transition to HCAN halt mode is delayed until
the bus becomes idle.
HCAN halt mode is cleared by clearing MCR1 to 0.
Rev. 7.00 Sep. 11, 2009 Page 427 of 566
REJ09B0211-0700