HD6417750RF240V Datasheet, PDF (497/606 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

Section 18 ROM
18.5.2 Flash Memory Control Register 2 (FLMCR2)
FLMCR2 is a register that displays the state of flash memory programming/erasing. FLMCR2 is a
read-only register, and should not be written to.
Bit Bit Name
7
FLER
6 to —
0
Initial Value R/W
0
R
All 0
—
Description
Indicates that an error has occurred during an
operation on flash memory (programming or
erasing). When FLER is set to 1, flash memory goes
to the error-protection state.
See section 18.9.3, Error Protection, for details.
Reserved
These bits are always read as 0.
18.5.3 Erase Block Register 1 (EBR1)
EBR1 specifies the flash memory erase area block. EBR1 is initialized to H'00 when the SWE bit
in FLMCR1 is 0. Do not set more than one bit at a time, as this will cause all the bits in EBR1 to
be automatically cleared to 0.
Bit Bit Name Initial Value R/W Description
7
EB7
0
R/W When this bit is set to 1, 8 kbytes of EB7
(H'00E000 to H'00FFFF) will be erased.
6
EB6
0
R/W When this bit is set to 1, 8 kbytes of EB6
(H'00C000 to H'00DFFF) will be erased.
5
EB5
0
R/W When this bit is set to 1, 16 kbytes of EB5
(H'008000 to H'00BFFF) will be erased.
4
EB4
0
R/W When this bit is set to 1, 28 kbytes of EB4
(H'001000 to H'007FFF) will be erased.
3
EB3
0
R/W When this bit is set to 1, 1 kbyte of EB3
(H'000C00 to H'000FFF) will be erased.
2
EB2
0
R/W When this bit is set to 1, 1 kbyte of EB2
(H'000800 to H'000BFF) will be erased.
1
EB1
0
R/W When this bit is set to 1, 1 kbyte of EB1
(H'000400 to H'0007FF) will be erased.
0
EB0
0
R/W When this bit is set to 1, 1 kbyte of EB0
(H'000000 to H'0003FF) will be erased.
Rev. 7.00 Sep. 11, 2009 Page 461 of 566
REJ09B0211-0700