HD6417750RF240V Datasheet, PDF (417/606 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

Reception
Section 14 Serial Communication Interface (SCI)
Read RDRF flag in SSR
RDRF = 1
Yes
Read receive data in RDR
No [1]
RE = 0
Make transition to software standby mode etc.
[2]
Cancel software standby mode etc.
[1] Data being received will be invalid.
[2] Module stop, watch, sub-active, and sub-
sleep modes are included.
Change operating mode?
Yes
Initialization
No
RE = 1
Start reception
Figure 14.37 Sample Flowchart for Mode Transition during Reception
14.9.7 Notes when Switching from SCK Pin to Port Pin
• Problem in Operation: When DDR and DR are set to 1, SCI clock output is used in clocked
synchronous mode, and the SCK pin is changed to the port pin while transmission is ended,
port output is enabled after low-level output occurs for one half-cycle.
When switching the SCK pin to the port pin by making the following settings while DDR = 1,
DR = 1, C/A = 1, CKE1 = 0, CKE0 = 0, and TE = 1, low-level output occurs for one half-
cycle.
1. End of serial data transmission
2. TE bit = 0
3. C/A bit = 0 ... switchover to port output
4. Occurrence of low-level output (see figure 14.38)
Rev. 7.00 Sep. 11, 2009 Page 381 of 566
REJ09B0211-0700