HD6417750RF240V Datasheet, PDF (331/606 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

Section 12 Programmable Pulse Generator (PPG)
12.4.5 Non-Overlapping Pulse Output
During non-overlapping operation, transfer from NDR to PODR is performed as follows:
• NDR bits are always transferred on PODR bits on compare match A.
• On compare match B, NDR bits are transferred only if their value is 0. Bits are not transferred
if their value is 1.
Figure 12.6 illustrates the non-overlapping pulse output operation.
DDR
NDER
Q
Compare match A
Compare match B
Pulse
output
pin
C
Q PODR D
Normal output/inverted output
Q NDR D
Internal data bus
Figure 12.6 Non-Overlapping Pulse Output
Therefore, 0 data can be transferred ahead of 1 data by making compare match B occur before
compare match A. The NDR contents should not be altered during the interval between compare
match B and compare match A (the non-overlap margin).
This can be accomplished by having the TGIA interrupt handling routine write the next data in
NDR, or by having the TGIA interrupt activate the DTC. Note, however, that the next data must
be written before the next compare match B occurs.
Figure 12.7 shows the timing of this operation.
Rev. 7.00 Sep. 11, 2009 Page 295 of 566
REJ09B0211-0700