HD6417750RF240V Datasheet, PDF (495/606 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

Section 18 ROM
18.4 Input/Output Pins
The flash memory is controlled by means of the pins shown in table 18.2.
Table 18.2 Pin Configuration
Pin Name
RES
FWE
MD2
MD1
MD0
TxD2
RxD2
I/O
Input
Input
Input
Input
Input
Output
Input
Function
Reset
Flash program/erase protection by hardware
Sets this LSI’s operating mode
Sets this LSI’s operating mode
Sets this LSI’s operating mode
Serial transmit data output
Serial receive data input
18.5 Register Descriptions
The flash memory has the following registers. For details on register addresses and register states
during each processing, refer to appendix A, On-Chip I/O Register.
• Flash memory control register 1 (FLMCR1)
• Flash memory control register 2 (FLMCR2)
• Erase block register 1 (EBR1)
• Erase block register 2 (EBR2)
• RAM emulation register (RAMER)
18.5.1 Flash Memory Control Register 1 (FLMCR1)
FLMCR1 is a register that makes the flash memory change to program mode, program-verify
mode, erase mode, or erase-verify mode. For details on register setting, refer to section 18.8, Flash
Memory Programming/Erasing.
Rev. 7.00 Sep. 11, 2009 Page 459 of 566
REJ09B0211-0700