HD6417750RF240V Datasheet, PDF (272/606 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

Section 10 16-Bit Timer Pulse Unit (TPU)
10.9.5 Contention between TCNT Write and Increment Operations
If incrementing occurs in the T₂ state of a TCNT write cycle, the TCNT write takes precedence
and TCNT is not incremented.
Figure 10.46 shows the timing in this case.
TCNT write cycle
T₁
T₂
φ
Address
Write signal
TCNT input
clock
TCNT
TCNT address
N
M
TCNT write data
Figure 10.46 Contention between TCNT Write and Increment Operations
Rev. 7.00 Sep. 11, 2009 Page 236 of 566
REJ09B0211-0700