HD6417750RF240V Datasheet, PDF (330/606 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

Section 12 Programmable Pulse Generator (PPG)
12.4.4 Example of Normal Pulse Output (Example of Five-Phase Pulse Output)
Figure 12.5 shows an example in which pulse output is used for cyclic five-phase pulse output.
TCNT value
TGRA
TCNT
Compare match
H'0000
NDRH
Time
80 C0 40 60 20 30 10 18 08 88 80 C0 40
PODRH 00 80 C0 40 60 20 30 10 18 08 88 80 C0
PO15
PO14
PO13
PO12
PO11
Figure 12.5 Normal Pulse Output Example (Five-Phase Pulse Output)
1. Set up TGRA of the TPU that is used as the output trigger to be an output compare register. Set
a frequency in TGRA so the counter will be cleared on compare match A. Set the TGIEA bit
of TIER to 1 to enable the compare match/input capture A (TGIA) interrupt.
2. Write H'F8 in P1DDR and NDERH, and set the G3CMS0, G3CMS1, G2CMS0, and G2CMS1
bits in PCR to select compare match in the TPU channel set up in the previous step to be the
output trigger. Write output data H'80 in NDRH.
3. When compare match A occurs, the NDRH contents are transferred to PODRH and output.
The TGIA interrupt handling routine writes the next output data (H'C0) in NDRH.
4. Five-phase overlapping pulse output (one or two phases active at a time) can be obtained
subsequently by writing H'40, H'60, H'20, H'30. H'10, H'18, H'08, H'88, ... at successive TGIA
interrupts. If the DTC is set for activation by this interrupt, pulse output can be obtained
without imposing a load on the CPU.
Rev. 7.00 Sep. 11, 2009 Page 294 of 566
REJ09B0211-0700