HD6417750RF240V Datasheet, PDF (600/606 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

Index
Programming/Erasing in User Program
Mode................................................ 466
General Registers...................................... 22
HCAN............................................... 99, 383
11 consecutive recessive bits ........... 412
Arbitration field ....................... 419, 422
buffer segment ................................. 415
Configuration mode......................... 412
Control field..................................... 419
Data field ......................................... 419
Data frame ....................................... 422
DTC Interface.................................. 429
HCAN Halt Mode............................ 427
HCAN Sleep Mode.......................... 424
mailbox ............................ 409, 411, 417
Message Control (MC0 to MC15) ... 409
Message Data (MD0 to MD15) ....... 411
Message transmission cancellation.. 419
Message Transmission Method ....... 417
Remote frame .................................. 423
remote transmission request bit ....... 423
Unread message overwrite............... 423
input pull-up MOS.................................. 127
Instruction Set........................................... 30
Arithmetic Operations Instructions.... 33
Bit Manipulation Instructions ............ 36
Block Data Transfer Instructions....... 40
Branch Instructions............................ 38
Data Transfer Instructions ................. 32
Logic Operations Instructions............ 35
Shift Instructions................................ 35
System Control Instructions .............. 39
Interrupt Control Modes ........................... 79
Interrupt Controller................................... 67
Interrupt Exception Handling Vector Table
.................................................................. 76
Interrupt Mask Bit..................................... 25
interrupt mask level .................................. 23
interrupt priority register (IPR)................. 67
Rev. 7.00 Sep. 11, 2009 Page 564 of 566
REJ09B0211-0700
Interrupts
ADI .................................................. 445
ERS0/OVR0..................................... 428
NMI.............................................. 75, 87
RM0 ................................................. 428
RM1 ................................................. 428
SLE0 ................................................ 428
SWDTEND...................................... 120
TCIU_1 ............................................ 224
TCIU_2 ............................................ 224
TCIU_4 ............................................ 224
TCIU_5 ............................................ 224
TCIV_0 ............................................ 224
TCIV_1 ............................................ 224
TCIV_2 ............................................ 224
TCIV_3 ............................................ 224
TCIV_4 ............................................ 224
TCIV_5 ............................................ 224
TGIA_0............................................ 224
TGIA_1............................................ 224
TGIA_2............................................ 224
TGIA_3............................................ 224
TGIA_4............................................ 224
TGIA_5............................................ 224
TGIB_0 ............................................ 224
TGIB_1 ............................................ 224
TGIB_2 ............................................ 224
TGIB_3 ............................................ 224
TGIB_4 ............................................ 224
TGIB_5 ............................................ 224
TGIC_0 ............................................ 224
TGIC_3 ............................................ 224
TGID_0............................................ 224
TGID_3............................................ 224
TGIMN ............................................ 263
TGINN............................................. 263
WOVI .............................................. 309
MAC instruction ....................................... 53
memory cycle............................................ 97
MMT....................................................... 100