HD6417750RF240V Datasheet, PDF (106/606 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

Section 5 Interrupt Controller
5.3.1 Interrupt Priority Registers A to H, J, K, M (IPRA to IPRH,IPRJ, IPRK, IPRM)
The IPR registers are eleven 8-bit readable/writable registers that set priorities (levels 7 to 0) for
interrupts other than NMI.
The correspondence between interrupt sources and IPR settings is shown in table 5.2. Setting a
value in the range from H'0 to H'7 in the 3-bit groups of bits 0 to 2 and 4 to 6 sets the priority of
the corresponding interrupt.
Bit Bit Name Initial Value R/W Description
7
—
0
—
Reserved
These bits are always read as 0.
6
IPR6
1
5
IPR5
1
4
IPR4
1
R/W Sets the priority of the corresponding interrupt
R/W source.
R/W _{000: Priority level 0 (Lowest)}
001: Priority level 1
010: Priority level 2
011: Priority level 3
100: Priority level 4
101: Priority level 5
110: Priority level 6
111: Priority level 7 (Highest)
3
—
0
—
Reserved
These bits are always read as 0.
2
IPR2
1
1
IPR1
1
0
IPR0
1
R/W Sets the priority of the corresponding interrupt
R/W source.
R/W _{000: Priority level 0 (Lowest)}
001: Priority level 1
010: Priority level 2
011: Priority level 3
100: Priority level 4
101: Priority level 5
110: Priority level 6
111: Priority level 7 (Highest)
Rev. 7.00 Sep. 11, 2009 Page 70 of 566
REJ09B0211-0700