HD6417750RF240V Datasheet, PDF (300/606 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

Section 11 Motor Management Timer (MMT)
11.6 Operation Timing
11.6.1 Input/Output Timing
TCNT and TDCNT Count Timing: Figure 11.9 shows the TCNT and TDCNT count timing.
φ
TCNT,
TDCNT
N−3 N−2 N−1 N N+1 N+2 N+3 N+4
Figure 11.9 Count Timing
TCNT Counter Clearing Timing: Figure 11.10 shows the timing of TCNT counter clearing by
an external signal.
φ
Counter clear
signal
TCNT
N − 3 N − 2 N − 1 N N + 1 2Td 2Td + 1 2Td + 2
TDDR
Td
Figure 11.10 TCNT Counter Clearing Timing
Rev. 7.00 Sep. 11, 2009 Page 264 of 566
REJ09B0211-0700