HD6417750RF240V Datasheet, PDF (416/606 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

Section 14 Serial Communication Interface (SCI)
TE bit
Transmission start
Transmission end
Transition to
Software standby
software standby _{mode cancelled}
mode
SCK
output pin
TxD
output pin
Port
input/output
Port
Marking output
Port
input/output
SCI TxD output
Last TxD bit retained Port input/output High output^*
Port
SCI
TxD output
Note: * Initialized in software standby mode
Figure 14.36 Pin States during Transmission in Clocked Synchronous Mode
(Internal Clock)
Reception: Before making the transition to module stop, software standby, watch, sub-active, or
sub-sleep mode, stop reception (RE = 0). RSR, RDR, and SSR are reset. If transition is made
during data reception, the data being received will be invalid.
To receive data in the same reception mode after mode cancellation, set RE to 1, and then start
reception. To receive data in a different reception mode, initialize the SCI first.
Figure 14.37 shows a sample flowchart for mode transition during reception.
Rev. 7.00 Sep. 11, 2009 Page 380 of 566
REJ09B0211-0700