HD6417750RF240V Datasheet, PDF (378/606 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

Section 14 Serial Communication Interface (SCI)
14.4.4 SCI Initialization (Asynchronous Mode)
Before transmitting and receiving data, you should first clear the TE and RE bits in SCR to 0, then
initialize the SCI as described below. When the operating mode, or transfer format, is changed for
example, the TE and RE bits must be cleared to 0 before making the change using the following
procedure. When the TE bit is cleared to 0, the TDRE flag is set to 1. Note that clearing the RE bit
to 0 does not initialize the contents of the RDRF, PER, FER, and ORER flags, or the contents of
RDR. When the external clock is used in asynchronous mode, the clock must be supplied even
during initialization.
Start initialization
Clear TE and RE bits in SCR to 0
Set CKE1 and CKE0 bits in SCR
[1]
(TE, RE bits 0)
Set data transfer format in
SMR and SCMR
Set value in BRR
Wait
1-bit interval elapsed?
Yes
[2]
[3]
No
Set TE and RE bits in
SCR to 1, and set RIE, TIE, TEIE,
[4]
and MPIE bits
[1] Set the clock selection in SCR.
Be sure to clear bits RIE, TIE,
TEIE, and MPIE, and bits TE and
RE, to 0.
When the clock is selected in
asynchronous mode, it is output
immediately after SCR settings are
made.
[2] Set the data transfer format in SMR
and SCMR.
[3] Write a value corresponding to the
bit rate to BRR. Not necessary if an
external clock is used.
[4] Wait at least one bit interval, then
set the TE bit or RE bit in SCR to 1.
Also set the RIE, TIE, TEIE, and
MPIE bits.
Setting the TE and RE bits enables
the TxD and RxD pins to be used.
<Initialization completion>
Figure 14.5 Sample SCI Initialization Flowchart
Rev. 7.00 Sep. 11, 2009 Page 342 of 566
REJ09B0211-0700