HD6417750RF240V Datasheet, PDF (401/606 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

Section 14 Serial Communication Interface (SCI)
14.7.2 Data Format (Except for Block Transfer Mode)
Figure 14.22 shows the transfer data format in Smart Card interface mode.
• One frame consists of 8-bit data plus a parity bit in asynchronous mode.
• In transmission, a guard time of at least 2 etu (Elementary Time Unit: the time for transfer of 1
bit) is left between the end of the parity bit and the start of the next frame.
• If a parity error is detected during reception, a low error signal level is output for one etu
period, 10.5 etu after the start bit.
• If an error signal is sampled during transmission, the same data is retransmitted automatically
after a delay of 2 etu or longer.
When there is no parity error
Ds D0 D1 D2 D3 D4 D5 D6 D7 Dp
Transmitting station output
When a parity error occurs
Ds D0 D1 D2 D3 D4 D5 D6 D7 Dp
DE
Transmitting station output
Legend:
DS:
Start bit
D0 to D7: Data bits
Dp:
Parity bit
DE:
Error signal
Receiving station
output
Figure 14.22 Normal Smart Card Interface Data Format
Data transfer with other types of IC cards (direct convention and inverse convention) are
performed as described in the following.
(Z) A Z Z A Z Z Z A A Z
Ds D0 D1 D2 D3 D4 D5 D6 D7 Dp
(Z) state
Figure 14.23 Direct Convention (SDIR = SINV = O/E = 0)
Rev. 7.00 Sep. 11, 2009 Page 365 of 566
REJ09B0211-0700