HD6417750RF240V Datasheet, PDF (312/606 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

Section 11 Motor Management Timer (MMT)
Bit Bit Name
14 POE2F
13 POE1F
12 POE0F
11 to —
9
8
PIE
Initial Value
0
0
0
All 0
0
R/W Description
R/(W)^*
POE2 Flag
Indicates that a high impedance request has been
input to the POE2 pin.
[Setting condition]
• When the input set by bits 4 and 5 of ICSR
occurs at the POE2 pin
[Clearing condition]
R/(W)^*
• When 0 is written to POE2F after reading POE2F
=1
POE1 Flag
Indicates that a high impedance request has been
input to the POE1 pin.
[Setting condition]
• When the input set by bits 2 and 3 of ICSR
occurs at the POE1 pin
[Clearing condition]
R/(W)^*
• When 0 is written to POE1F after reading POE1F
=1
POE0 Flag
Indicates that a high impedance request has been
input to the POE0 pin.
[Setting condition]
• When the input set by bits 0 and 1 of ICSR
occurs at the POE0 pin
[Clearing condition]
• When 0 is written to POE0F after reading POE0F
=1
—
Reserved
These bits are always read as 0. Only 0 should be
written to these bits.
R/W Port Interrupt Enable
Enables or disables an interrupt request when 1 is
set in any of bits POE0F to POE3F in ICSR.
0: Interrupt request disabled
1: Interrupt request enabled
Rev. 7.00 Sep. 11, 2009 Page 276 of 566
REJ09B0211-0700