HD6417750RF240V Datasheet, PDF (266/606 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

Section 10 16-Bit Timer Pulse Unit (TPU)
10.8.2 Interrupt Signal Timing
TGF Flag Setting Timing in Case of Compare Match: Figure 10.38 shows the timing for
setting of the TGF flag in TSR on compare match, and TGI interrupt request signal timing.
φ
TCNT input
clock
TCNT
N
N+1
TGR
N
Compare
match signal
TGF flag
TGI interrupt
Figure 10.38 TGI Interrupt Timing (Compare Match)
TGF Flag Setting Timing in Case of Input Capture: Figure 10.39 shows the timing for setting
of the TGF flag in TSR on input capture, and TGI interrupt request signal timing.
φ
Input capture
signal
TCNT
N
TGR
N
TGF flag
TGI interrupt
Figure 10.39 TGI Interrupt Timing (Input Capture)
Rev. 7.00 Sep. 11, 2009 Page 230 of 566
REJ09B0211-0700