HD6417750RF240V Datasheet, PDF (339/606 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

Section 13 Watchdog Timer
Section 13 Watchdog Timer
The watchdog timer (WDT) is an 8-bit timer that can generate an internal reset signal for this LSI
if a system crash prevents the CPU from writing to the timer counter, thus allowing it to overflow.
When this watchdog function is not needed, the WDT can be used as an interval timer. In interval
timer operation, an interval timer interrupt is generated each time the counter overflows.
The block diagram of the WDT is shown in figure 13.1.
13.1 Features
• Selectable from eight counter input clocks.
• Switchable between watchdog timer mode and interval timer mode.
In watchdog timer mode
• If the counter overflows, it is possible to select whether this LSI is internally reset or not.
In interval timer mode
• If the counter overflows, the WDT generates an interval timer interrupt (WOVI).
Rev. 7.00 Sep. 11, 2009 Page 303 of 566
REJ09B0211-0700