HD6417750RF240V Datasheet, PDF (469/606 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

Section 15 Controller Area Network (HCAN)
15.8.11 HCAN Transmit Procedure
When transmission is set while the bus is in the idle state, if the next transmission is set or the set
transmission is canceled under the following conditions within 50 μs, the transmit message ID of
being set may be damaged.
• When the second transmission has the message whose priority is higher than the first one
• When the massage of the highest priority is canceled in the first transmission
Make whichever setting shown below to avoid the message IDs from being damaged.
• Set transmission in one TXPR. After transmission of all transmit messages is completed, set
transmission again (mass transmission setting). The interval between transmission settings
should be 50 μs or longer.
• Make the transmission setting according to the priority of transmit messages.
• Set the interval to be 50 μs or longer between TXPR and another TXPR or between TXPR and
TXCR.
Table 15.5 Interval Limitation between TXPR and TXPR or between TXPR and TXCR
Baud Rate (bps)
1M
500 k
250 k
Set Interval (μs)
50
50
50
15.8.12 Note on Releasing the HCAN Reset or HCAN Sleep
Before releasing the HCAN reset or HCAN sleep (MCR0 = 0 or MCR5 = 0), confirm that the
GSR3 bit (the reset status bit) is set to 1.
15.8.13 Note on Accessing Mailbox during the HCAN Sleep
Do not access the mailbox during the HCAN sleep. If accessed, the CPU might halt. Accessing
registers during the HCAN sleep does not cause the CPU halt, nor does accessing the mailbox in
other than the HCAN sleep mode.
Rev. 7.00 Sep. 11, 2009 Page 433 of 566
REJ09B0211-0700