HD6417750RF240V Datasheet, PDF (456/606 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

Section 15 Controller Area Network (HCAN)
can be requested, and if the mailbox empty interrupt (IRR8) is enabled for the bits (MBIMR1 to
MBIMR15) corresponding to the mailbox interrupt mask register (MBIMR) and interrupt mask
register (IMR), interrupts may be sent to the CPU.
However, a transmit wait message cannot be canceled at the following times:
• During internal arbitration or CAN bus arbitration
• During data frame or remote frame transmission
Figure 15.10 shows a flowchart for transmit message cancellation.
Message transmit wait TXPR setting
Set TXCR bit corresponding to
message to be canceled
: Settings by user
: Processing by hardware
Cancellation possible?
Yes
Message not sent
Clear TXCR, TXPR
ABACK = 1
IRR8 = 1
No
Completion of message transmission
TXACK = 1
Clear TXCR, TXPR
IRR8 = 1
IMR8 = 1?
Yes
No
Interrupt to CPU
Clear TXACK
Clear ABACK
Clear IRR8
End of transmission/transmission
cancellation
Figure 15.10 Transmit Message Cancellation Flowchart
Rev. 7.00 Sep. 11, 2009 Page 420 of 566
REJ09B0211-0700