HD6417750RF240V Datasheet, PDF (11/606 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

Contents
Section 1 Overview................................................................................................1
1.1 Overview................................................................................................................................ 1
1.2 Internal Block Diagram.......................................................................................................... 3
1.3 Pin Arrangement .................................................................................................................... 5
1.4 Pin Functions ......................................................................................................................... 7
1.5 Differences between H8S/2612, H8S/2611, H8S/2614, and H8S/2616............................... 12
Section 2 CPU......................................................................................................13
2.1 Features ................................................................................................................................ 13
2.1.1 Differences between H8S/2600 CPU and H8S/2000 CPU ..................................... 14
2.1.2 Differences from H8/300 CPU ............................................................................... 15
2.1.3 Differences from H8/300H CPU............................................................................. 15
2.2 CPU Operating Modes ......................................................................................................... 16
2.2.1 Normal Mode.......................................................................................................... 16
2.2.2 Advanced Mode...................................................................................................... 17
2.3 Address Space...................................................................................................................... 20
2.4 Register Configuration......................................................................................................... 21
2.4.1 General Registers .................................................................................................... 22
2.4.2 Program Counter (PC) ............................................................................................ 23
2.4.3 Extended Control Register (EXR) .......................................................................... 23
2.4.4 Condition-Code Register (CCR) ............................................................................. 24
2.4.5 Multiply-Accumulate Register (MAC) ................................................................... 26
2.4.6 Initial Values of CPU Registers .............................................................................. 26
2.5 Data Formats........................................................................................................................ 27
2.5.1 General Register Data Formats ............................................................................... 27
2.5.2 Memory Data Formats ............................................................................................ 29
2.6 Instruction Set ...................................................................................................................... 30
2.6.1 Table of Instructions Classified by Function .......................................................... 31
2.6.2 Basic Instruction Formats ....................................................................................... 40
2.7 Addressing Modes and Effective Address Calculation ........................................................ 42
2.7.1 Register Direct—Rn................................................................................................ 42
2.7.2 Register Indirect—@ERn ....................................................................................... 42
2.7.3 Register Indirect with Displacement—@(d:16, ERn) or @(d:32, ERn)................. 43
2.7.4 Register Indirect with Post-Increment or Pre-Decrement—@ERn+ or @-ERn ..... 43
2.7.5 Absolute Address—@aa:8, @aa:16, @aa:24, or @aa:32....................................... 43
2.7.6 Immediate—#xx:8, #xx:16, or #xx:32 .................................................................... 44
2.7.7 Program-Counter Relative—@(d:8, PC) or @(d:16, PC)....................................... 44
2.7.8 Memory Indirect—@@aa:8 ................................................................................... 44
2.7.9 Effective Address Calculation ................................................................................ 45
Rev. 7.00 Sep. 11, 2009 Page ix of xxxiv
REJ09B0211-0700