HD6417750RF240V Datasheet, PDF (309/606 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

Section 11 Motor Management Timer (MMT)
Note on MMT Dead Time: The dead time (non-overlap time) may be shorter than the value set in
the time dead time register (MMT_TDDR), or a silent (consisting of 0s) PWM waveform may be
output.
Dead time matches set value exactly
Dead time is shorter than set value
PUOA*
PUOB*
Normal output waveform
Output waveform
caused by dead time limitation
Note: * Also applies to the combination of PVOA and PVBO or PWOA and PWBO.
Figure 11.20 Output Waveform Caused by Dead Time Limitation
To prevent the problem from occurring, implement either A or B below.
1. Set the CST bit to 1 and do not clear it after MMT counting begins. If there is a need to clear
the CST bit, do not set it to 1 again.
2. In order to set, clear, and then reset the CST bit, use the following procedure for clearing and
resetting.
(1) Set the PWM output pin as a general input port in the MMT pin control register.
(2) Set a value of H'0000 in the free operation addresses of all the buffer registers (TBRU,
TBRV and TBRW).
(3) After the set dead time interval has elapsed set TCNR to H'00 and clear the CST bit to 0.
(4) Reset the CST bit to 1.
Rev. 7.00 Sep. 11, 2009 Page 273 of 566
REJ09B0211-0700