HD6417750RF240V Datasheet, PDF (215/606 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

Section 10 16-Bit Timer Pulse Unit (TPU)
Table 10.17 TIORL_3 (channel 3)
Description
Bit 7 Bit 6 Bit 5 Bit 4 TGRD_3
IOD3 IOD2 IOD1 IOD0 Function
TIOCD_3 Pin Function
0
0
0
0
Output
Output disabled
1
compare
register^*2
Initial output is 0
0 output at compare match
1
0
Initial output is 0
1 output at compare match
1
Initial output is 0
Toggle output at compare match
1
0
0
Output disabled
1
Initial output is 1
0 output at compare match
1
0
Initial output is 1
1 output at compare match
1
Initial output is 1
Toggle output at compare match
1
0
0
0
Input
Input capture at rising edge
1
capture
register^*2
Input capture at falling edge
1
X
Input capture at both edges
1
X
X
Capture input source is channel 4/count clock
Input capture at TCNT_4 count-up/count-down^*1
Legend:
X: Don’t care
Notes: 1. When bits TPSC0 to TPSC2 in TCR_4 are set to B'000 and φ/1 is used as the TCNT_4
count clock, this setting is invalid and input capture is not generated.
2. When the BFB bit in TMDR_3 is set to 1 and TGRD_3 is used as a buffer register, this
setting is invalid and input capture/output compare is not generated.
Rev. 7.00 Sep. 11, 2009 Page 179 of 566
REJ09B0211-0700