HD6417750RF240V Datasheet, PDF (107/606 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

Section 5 Interrupt Controller
5.3.2 IRQ Enable Register (IER)
IER is an 8-bit readable/writable register that controls the enabling and disabling of interrupt
requests IRQ0 to IRQ5.
Bit Bit Name Initial Value R/W Description
7, 6 −
All 0
R/W Reserved
Only 0 should be written to these bits.
5
IRQ5E
0
R/W IRQ5 Enable
The IRQ5 interrupt request is enabled when this bit
is 1.
4
IRQ4E
0
R/W IRQ4 Enable
The IRQ4 interrupt request is enabled when this bit
is 1.
3
IRQ3E
0
R/W IRQ3 Enable
The IRQ3 interrupt request is enabled when this bit
is 1.
2
IRQ2E
0
R/W IRQ2 Enable
The IRQ2 interrupt request is enabled when this bit
is 1.
1
IRQ1E
0
R/W IRQ1 Enable
The IRQ1 interrupt request is enabled when this bit
is 1.
0
IRQ0E
0
R/W IRQ0 Enable
The IRQ0 interrupt request is enabled when this bit
is 1.
5.3.3 IRQ Sense Control Registers H and L (ISCRH, ISCRL)
The ISCR registers are 16-bit readable/writable registers that select the source that generates an
interrupt request at pins IRQ0 to IRQ5.
Rev. 7.00 Sep. 11, 2009 Page 71 of 566
REJ09B0211-0700