HD6417750RF240V Datasheet, PDF (394/606 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

Section 14 Serial Communication Interface (SCI)
Synchronization
clock
Serial data
Transfer direction
Bit 0 Bit 1
Bit 7 Bit 0 Bit 1
Bit 6 Bit 7
TDRE
TEND
TXI interrupt
request generated
Data written to TDR
and TDRE flag cleared
to 0 in TXI interrupt
service routine
TXI interrupt
request generated
1 frame
TEI interrupt request
generated
Figure 14.16 Sample SCI Transmission Operation in Clocked Synchronous Mode
Rev. 7.00 Sep. 11, 2009 Page 358 of 566
REJ09B0211-0700