HD6417750RF240V Datasheet, PDF (101/606 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

Section 4 Exception Handling
4.8 Usage Note
When accessing word data or longword data, this LSI assumes that the lowest address bit is 0. The
stack should always be accessed by word transfer instruction or longword transfer instruction, and
the value of the stack pointer (SP, ER7) should always be kept even. Use the following
instructions to save registers:
PUSH.W Rn (or MOV.W Rn, @-SP)
PUSH.L ERn (or MOV.L ERn, @-SP)
Use the following instructions to restore registers:
POP.W
POP.L
Rn (or MOV.W @SP+, Rn)
ERn (or MOV.L @SP+, ERn)
Setting SP to an odd value may lead to a malfunction. Figure 4.4 shows an example of what
happens when the SP value is odd.
Address
CCR
SP
SP
R1L
H'FFFEFA
H'FFFEFB
PC
PC
H'FFFEFC
H'FFFEFD
H'FFFEFE
SP
H'FFFEFF
SP set to H'FFFEFF
TRAPA instruction executed MOV.B R1L, @-ER7 executed
Data saved above SP
Contents of CCR lost
Legend:
CCR: Condition code register
PC: Program counter
R1L: General register R1L
SP: Stack pointer
Note: This diagram illustrates an example in which the interrupt control mode is 0, in advanced mode.
Figure 4.4 Operation when SP Value is Odd
Rev. 7.00 Sep. 11, 2009 Page 65 of 566
REJ09B0211-0700