HD6417750RF240V Datasheet, PDF (432/606 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

Section 15 Controller Area Network (HCAN)
15.3.9 Receive Complete Register (RXPR)
The receive complete register (RXPR) is a 16-bit register containing status flags that indicate the
normal reception of messages in mailboxes (buffers). For reception of a remote frame, when a bit
in this register is set to 1, the corresponding remote request register (RFPR) bit is also set to 1
simultaneously.
Bit Bit Name
Initial Value R/W
Description
15 RXPR7
0
14 RXPR6
0
13 RXPR5
0
12 RXPR4
0
11 RXPR3
0
10 RXPR2
0
9
RXPR1
0
8
RXPR0
0
7
RXPR15
0
6
RXPR14
0
5
RXPR13
0
4
RXPR12
0
3
RXPR11
0
2
RXPR10
0
1
RXPR9
0
0
RXPR8
0
R/(W)^*
R/(W)^*
R/(W)^*
R/(W)^*
R/(W)^*
R/(W)^*
R/(W)^*
R/(W)^*
R/(W)^*
R/(W)^*
R/(W)^*
R/(W)^*
R/(W)^*
R/(W)^*
R/(W)^*
R/(W)^*
When the message in mailbox n (n = 0 to 15) has
been received error-free, RXPRn is set to 1.
[Setting condition]
• Completion of message (data frame or remote
frame) reception in corresponding mailbox
[Clearing condition]
• Writing 1
Note: * Only 1 can be written to clear the flag.
Rev. 7.00 Sep. 11, 2009 Page 396 of 566
REJ09B0211-0700