SH7709S Datasheet, PDF (780/807 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series

PCMCIA Memory Interface (Area 6)
PCMCIA/IO Interface (Area 6)
8-Bit
8-Bit
Bus
16-Bit Bus Width
Bus
16-Bit Bus Width
Width
Width
Pin
Byte/
Word/
Long-
word
Access
Byte
Access
(Ad-
dress
2n)
Byte
Access
(Ad-
dress
2n + 1)
Word/
Long-
word
Access
Byte/
Word/
Long-
word
Access
Byte
Access
(Ad-
dress
2n)
Byte
Access
(Ad-
dress
2n+1)
Word/
Long-
word
Access
CS6 to CS2, CS0
Enabled Enabled High
Enabled Enabled Enabled High
Enabled
RD
R Low
Low
Low
Low
High
High
High
High
W High
High
High
High
High
High
High
High
RD/WR
R High
High
High
High
High
High
High
High
W Low
Low
Low
Low
Low
Low
Low
Low
BS
Enabled Enabled Enabled Enabled Enabled Enabled Enabled Enabled
RAS3U/PTE[2]
High
High
High
High
High
High
High
High
RAS3L/PTJ[0]
High
High
High
High
High
High
High
High
CASL/PTJ[2]
High
High
High
High
High
High
High
High
CASU/PTJ[3]
High
High
High
High
High
High
High
High
WE0/DQMLL
R High
High
High
High
High
High
High
High
W High
High
High
High
High
High
High
High
WE1/DQMLU/WE R High
High
High
High
High
High
High
High
W Low
Low
Low
Low
High
High
High
High
WE2/DQMUL/
ICIORD/PTK[6]
R High
W High
High
High
High
High
High
High
Low
High
Low
High
Low
High
Low
High
WE3/DQMUU/
ICIOWR/PTK[7]
R High
W High
High
High
High
High
High
High
High
Low
High
Low
High
Low
High
Low
CE2A/PTE[4]
High
High
High
High
High
High
High
High
CE2B/PTE[5]
High
High
Low
Low
High
High
Low
Low
CKE/PTK[5]
Disabled Disabled Disabled Disabled Disabled Disabled Disabled Disabled
WAIT
Enabled^*1 Enabled^*1 Enabled^*1 Enabled^*1 Enabled^*1 Enabled^*1 Enabled^*1 Enabled^*1
IOIS16/PTG[7]
Disabled Disabled Disabled Disabled Disabled Disabled Enabled Enabled
A25 to A0
Address Address Address Address Address Address Address Address
D7 to D0
D15 to D8
Valid
data
High-Z^*2
Valid
data
Invalid
data
Invalid
data
Valid
data
Valid
data
Valid
data
Valid
data
High-Z^*2
Valid
data
Invalid
data
Invalid
data
Valid
data
Valid
data
Valid
data
D31 to D16
High-Z^*2 High-Z^*2 High-Z^*2 High-Z^*2 High-Z^*2 High-Z^*2 High-Z^*2 High-Z^*2
Notes: 1. Disabled when WCR2 register wait setting is 0.
2. Unused data pins should be switched to the port function, or pulled up.
Rev. 5.00, 09/03, page 736 of 760