SH7709S Datasheet, PDF (712/807 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series

Stable input clock
EXTAL input
or CKIO
input
PLL synchronization
PLL output,
CKIO output
Reset or NMI interrupt request
Stable input clock
t_PLL1
PLL synchronization
Internal clock
STATUS 0
STATUS 1
Normal
Standby
Normal
Note: PLL oscillation settling time during the continued oscillation mode or
when clock is input from EXTAL pin or CKIO pin
Figure 23.8 PLL Synchronization Settling Time during Standby Recovery (Reset or NMI)
Stable input clock
EXTAL input
or CKIO input
PLL synchronization
PLL output,
CKIO output
IRQ4 – IRQ0/IRL3 – IRL0 interrupt request
Stable input clock
t_IRLSTB
t_PLL1
PLL synchronization
Internal clock
STATUS 0
STATUS 1
Normal
Standby
Normal
Note: PLL oscillation settling time during the continued oscillation mode or
when clock is input from EXTAL pin or CKIO pin
Figure 23.9 PLL Synchronization Settling Time during Standby Recovery
(IRQ/IRL or PINT0/PINT1 Interrupt)
Rev. 5.00, 09/03, page 668 of 760