SH7709S Datasheet, PDF (470/807 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series

13.4 Usage Notes
13.4.1 Register Writing during RTC Count
The following RTC registers cannot be written to during an RTC count (while bit 0 = 1 in RCR2).
RSECCNT, RMINCNT, RHRCNT, RDAYCNT, RWKCNT, RMONCNT, RYRCNT
The RTC count must be halted before writing to any of the above registers.
13.4.2 Use of Realtime Clock (RTC) Periodic Interrupts
The method of using the periodic interrupt function is shown in figure 13.6.
A periodic interrupt can be generated periodically at the interval set by the periodic interrupt
enable flag (PES) in RTC control register 2 (RCR2). When the time set by the periodic interrupt
enable flag (PES) has elapsed, the periodic interrupt flag (PEF) is set to 1.
The periodic interrupt flag (PEF) is cleared to 0 upon periodic interrupt generation when the
periodic interrupt enable flag (PES) is set. Periodic interrupt generation can be confirmed by
reading this bit, but normally the interrupt function is used.
Set PES, clear PEF
Set PES, and clear PEF to 0,
in RCR2
Elapse of time set by PES
Clear PEF
Clear PEF to 0
Figure 13.6 Using Periodic Interrupt Function
13.4.3 Precautions when Using RTC Module Standby
Before switching the RTC to module standby, access at least one among the registers RTC, SCI,
and TMU.
Rev. 5.00, 09/03, page 426 of 760