SH7709S Datasheet, PDF (765/807 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series

Pin
CS2/PTK[0]
CS0/MCS0
Pin No.
(FP-208C,
FP-208E)
98
96
Pin No.
(BP-240A)
T16
T15
BS/PTK[4]
87
PTJ[5]
113
PTJ[4]
112
CASU/PTJ[3]
110
CASL/PTJ[2]
108
DACK0/PTD[5] 114
DACK1/PTD[7] 115
RD
88
WE0/ DQMLL 89
WE1/DQMLU/WE 90
W12
R17
U17
T17
R18
R16
P19
T13
U13
V13
WE2/DQMUL/ 91
ICIORD/PTK[6]
WE3/DQMUU/ 92
ICIOWR/PTK[7]
RD/WR
93
AUDSYNC/
94
PTE[7]
PTE[6]
116
PTE[3]
117
RAS3U/PTE[2] 118
PTE[1]
119
TDO/PTE[0]
120
RESETM
124
ADTRG/PTH[5] 125
IOIS16/PTG[7] 126
ASMD0/PTG[6] 127
ASEBRKAK/
128
PTG[5]
W13
T14
U14
V14
P18
P17
P16
N19
N18
M18
M17
M16
L19
L18
I/O
Function
I/O Chip select 2 / I/O port
O Chip select 0 / Mask ROM chip
select 0
I/O Bus cycle start / I/O port
I/O I/O port
I/O I/O port
I/O CAS(SDRAM) / I/O port
I/O CAS(SDRAM) / I/O port
I/O DMA transfer strobe 0 / I/O port
I/O DMA transfer strobe 1 / I/O port
O Read strobe pin
O D7–D0 select signal/ DQM(SDRAM)
O D15–D8 select signal /
DQM(SDRAM)/ PCMCIA
WE signal
I/O D23–D16 select signal /
DQM(SDRAM) / PCMCIA IORD
signal / I/O port
I/O D31–D24 select signal
/DQM(SDRAM) / PCMCIA IOWR
signal / I/O port
O Read/write select signal
I/O AUD synchronous I/O port
I/O I/O port
I/O I/O port
I/O RAS(SDRAM) / I/O port
I/O I/O port
I/O Test data output I/O port
I Manual reset input
I ADC trigger request / Input port
I I/O for PC card / input port
I ASE mode / input port
I ASE break accept / input port
Rev. 5.00, 09/03, page 721 of 760