SH7709S Datasheet, PDF (638/807 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series

19.5.2 Port D Data Register (PDDR)
Bit: 7
PD7DT
Initial value: 0
R/W: R/W
Note: * Undefined
6
PD6DT
*
R
5
PD5DT
0
R/W
4
PD4DT
*
R
3
PD3DT
0
R/W
2
PD2DT
0
R/W
1
PD1DT
0
R/W
0
PD0DT
0
R/W
The port D data register (PDDR) is a 6-bit readable/writable and 2-bit read-only register that stores
data for pins PTD7 to PTD0. Bits PD7DT to PD0DT correspond to pins PTD7 to PTD0. When the
pin function is general output port, if the port is read, the value of the corresponding PDDR bit is
returned directly. When the function is general input port, if the port is read, the corresponding pin
level is read. Table 19.8 shows the function of PDDR.
PDDR is initialized to B'0*0*0000 by a power-on reset. After initialization, the general input port
function (pull-up MOS on) is set as the initial pin function, and the corresponding pin levels are
read from bits PD7DT—PD3DT, PD1DT, and PD0DT. PDDR retains its previous value in
standby mode and sleep mode, and in a manual reset.
Note that the low level is read if bits 6 and 4 are read except in general-purpose input.
Table 19.8 Port D Data Register (PDDR) Read/Write Operations
PDnMD1
0
1
PDnMD0
0
1
0
1
Pin State
Other function
(see table 18.1)
Output
Input (Pull-up
MOS on)
Input (Pull-up
MOS off)
Read
Write
PDDR value Value is written to PDDR, but does not
affect pin state
PDDR value Write value is output from pin
Pin state
Value is written to PDDR, but does not
affect pin state
Pin state
Value is written to PDDR, but does not
affect pin state
(n = 0, 1, 2, 3, 5, 7)
PDnMD1
0
1
PDnMD0
0
1
0
1
Pin State
Other function
(see table 18.1)
Reserved
Input (Pull-up
MOS on)
Input (Pull-up
MOS off)
Read
Low level
Low level
Pin state
Pin state
Rev. 5.00, 09/03, page 594 of 760
Write
Ignored (no effect on pin state)
Ignored (no effect on pin state)
Ignored (no effect on pin state)
Ignored (no effect on pin state)
(n = 4, 6)