SH7709S Datasheet, PDF (769/807 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series

A.4 Pin States in Access to Each Address Space
Table A.3 Pin States (Ordinary Memory/Little Endian)
Pin
CS6 to CS2, CS0
RD
RD/WR
BS
RAS3U/PTE[2]
RAS3L/PTJ[0]
CASL/PTJ[2]
CASU/PTJ[3]
WE0/DQMLL
WE1/DQMLU/WE
WE2/DQMUL/
ICIORD/PTK[6]
WE3/DQMUU/
ICIOWR/PTK[7]
CE2A/PTE[4]
CE2B/PTE[5]
CKE/PTK[5]
WAIT
IOIS16/PTG[7]
A25 to A0
D7 to D0
D15 to D8
D31 to D16
8-Bit Bus Width
Byte/Word/Long-
word Access
Byte Access
(Address 2n)
Enabled
Enabled
R Low
Low
W High
High
R High
High
W Low
Low
Enabled
Enabled
High
High
High
High
High
High
High
High
R High
High
W Low
Low
R High
High
W High
High
R High
High
W High
High
R High
High
W High
High
High
High
High
High
Disabled
Disabled
Enabled^*1
Enabled^*1
Disabled
Disabled
Address
Address
Valid data
High-Z^*2
High-Z^*2
Valid data
Invalid data
High-Z^*2
16-Bit Bus Width
Byte Access Word/Longword
(Address 2n + 1)
Access
Enabled
Enabled
Low
Low
High
High
High
High
Low
Low
Enabled
Enabled
High
High
High
High
High
High
High
High
High
High
High
Low
High
High
Low
Low
High
High
High
High
High
High
High
High
High
High
High
High
Disabled
Disabled
Enabled^*1
Enabled^*1
Disabled
Disabled
Address
Address
Invalid data
Valid data
Valid data
High-Z^*2
Valid data
High-Z^*2
Rev. 5.00, 09/03, page 725 of 760