SH7709S Datasheet, PDF (394/807 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series

(1) When channel 0 transfers
Initial priority order _{CH0 > CH1 > CH2 > CH3}
Channel 0 becomes lowest-
priority.
Priority order
after transfer
CH1 > CH2 > CH3 > CH0
(2) When channel 1 transfers
Initial priority order
Priority order
after transfer
CH0 > CH1 > CH2 > CH3
CH2 > CH3 > CH0 > CH1
Channel 1 becomes lowest-
priority.
The priority of channel 0, which
was higher than channel 1, is also
shifted.
(3) When channel 2 transfers
Initial priority order CH0 > CH1 > CH2 > CH3
Channel 2 becomes lowest-
priority.
The priority of channels 0 and 1,
which were higher than channel 2,
Priority order
after transfer
CH3 > CH0 > CH1 > CH2
are also shifted. If immediately
after there is a request to transfer
channel 1 only, channel 1 becomes
lowest-priority and the priority of
channels 3 and 0, which were
Post-transfer priority order
higher than channel 1, is also
when there is an
CH2 > CH3 > CH0 > CH1 _shifted.
immediate transfer
request to channel 1 only
(4) When channel 3 transfers
Priority order
after transfer
Priority order
after transfer
CH0 > CH1 > CH2 > CH3
CH0 > CH1 > CH2 > CH3
Priority order does not change.
Figure 11.3 Round-Robin Mode
Rev. 5.00, 09/03, page 350 of 760