SH7709S Datasheet, PDF (375/807 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series

11.1.4 Register Configuration
Table 11.2 summarizes the DMAC registers. The DMAC has a total of 17 registers: each channel
has four registers, and one overall DMAC control register.
Table 11.2 DMAC Registers
Channel Name
0
DMA source address
register 0
DMA destination
address register 0
DMA transfer count
register 0
DMA channel control
register 0
1
DMA source address
register 1
DMA destination
address register 1
DMA transfer count
register 1
DMA channel control
register 1
2
DMA source address
register 2
DMA destination
address register 2
DMA transfer count
register 2
DMA channel control
register 2
Abbrevi-
ation
R/W Initial Value Address
Register Access
Size
Size
SAR0
R/W Undefined
H'04000020
32
(H'A4000020)^*4
16, 32^*2
DAR0
R/W Undefined
H'04000024
32
(H'A4000024)^*4
16, 32^*2
DMATCR0 R/W Undefined
H'04000028
24
(H'A4000028)^*4
16, 32^*3
CHCR0
R/W^*1 H'00000000 H'0400002C
32
(H'A400002C)^*4
8, 16, 32^*2
SAR1
R/W Undefined
H'04000030
32
(H'A4000030)^*4
16, 32^*2
DAR1
R/W Undefined
H'04000034
32
(H'A4000034)^*4
16, 32^*2
DMATCR1 R/W Undefined
H'04000038
24
(H'A4000038)^*4
16, 32^*3
CHCR1
R/W^*1 H'00000000 H'0400003C
32
(H'A400003C)^*4
8, 16, 32^*2
SAR2
R/W Undefined
H'04000040
32
(H'A4000040)^*4
16, 32^*2
DAR2
R/W Undefined
H'04000044
32
(H'A4000044)^*4
16, 32^*2
DMATCR2 R/W Undefined
H'04000048
24
(H'A4000048)^*4
16, 32^*3
CHCR2
R/W^*1 H'00000000 H'0400004C
32
(H'A400004C)^*4
8, 16, 32^*2
Rev. 5.00, 09/03, page 331 of 760