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| SH7709S Datasheet, PDF (737/807 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series | |||
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Tc1
Tc2
Tc3
Tc4
CKIO
tAD
A25 to A16
tAD
A12 or A10
tAD
A15 to A0
CSn
RD/WR
RAS
CAS
tCSD3
tRWD
tRASD2
tCASD2
tDQMD
DQMxx
tWDD2
D31 to D0
tBSD
BS
Row address
Write command
Column address
tAD
tAD
tAD
tCSD3
tRWD
tRASD2
tCASD2
tDQMD
tWDD2
tBSD
CKE
DACKn
(High)
tDAKD1
tDAKD1
Figure 23.34 Synchronous DRAM Burst Write Bus Cycle
(RAS Down, Same Row Address)
Rev. 5.00, 09/03, page 693 of 760
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