SH7709S Datasheet, PDF (584/807 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series

Initialization
Clear TE and RE bits in SCSCR to 0 ₍₁₎
Set TFRST and RFRST bits in
SCFCR to 1
Set CKE1 and CKE0
bits in SCSCR (leaving TE and RE
bits cleared to 0)
Set communication format in SCSMR ₍₂₎
Set value in SCBRR
(3)
Wait
No
1-bit interval elapsed?
(4)
Yes
Set RTRG1-0, TTRG1-0, and MCE
in SCFCR
Clear TFRST and RFRST bits to 0
Set TE and RE bits in
SCSCR to 1,and set RIE, TIE,
TEIE, and MPIE bits
End
Note: Numbers in parentheses refer to steps in the preceding procedure description.
Figure 16.5 Sample Flowchart for SCIF Initialization
Rev. 5.00, 09/03, page 540 of 760